Note: Prof. Mikko Lipasti has a financial interest in Thalchemy Corp.
- Modeling Architectural Support for Tightly-Coupled Accelerators [IEEE Online]
David Schlais, Heng Zhuo, and Mikko Lipasti
In Proceedings of the 2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Boston, MA, August 2020.
- BitBench: A Benchmark for Bitstream Computing [PDF]
Kyle Daruwalla, Heng Zhuo, Carly Schulz, and Mikko Lipasti
In Proceedings of Languages, Compilers, Tools and Theory of Embedded Systems (LCTES’19), Phoenix, AZ, June 2019.
- Recycling Data Slack in Out-of-Order Cores [PDF]
Gokul Subramanian Ravi and Mikko Lipasti
In Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture (HPCA-25), Washington D.C., February 2019.
-
Compiler-assisted Coalescing [PDF]
Sooraj Puthoor and Mikko H. Lipasti
In Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques (PACT 2018), Cyprus, November 2018
- Aggressive Slack Recycling via Transparent Pipelines [PDF]
Gokul Subramanian Ravi and Mikko Lipasti
In Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Bellevue, Washington, July 2018.
- The CURE: Cluster Communication Using Registers [PDF]
Vignyan Reddy Kothinti Naresh, Dibakar Gope, and Mikko Lipasti
In Proceedings of CASES: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, Seoul, Korea, October 2017.
- Temporal Codes in On-Chip Interconnects [PDF]
Michael Mishkin, Nam Sung Kim, and Mikko Lipasti
In Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Taipei, Taiwan, July 2017.
-
Architectural Support for Server-Side PHP Processing [PDF]
Dibakar Gope, David Schlais, and Mikko H. Lipasti
In Proceedings of the 44th International Symposium on Computer Architecture (ISCA-44), Toronto, ON, Canada, June 2017
-
CHARSTAR: Clock Hierarchy Aware Resource Scaling in Tiled ARchitectures [PDF]
Gokul Subramanian Ravi and Mikko Lipasti
In Proceedings of the 44th International Symposium on Computer Architecture (ISCA-44), Toronto, ON, Canada, June 2017
-
Evaluating Hopfield-network-based linear solvers for hardware constrained neural substrates [PDF]
Rohit Shukla, Erik Jorgensen and Mikko Lipasti
In Proceedings of the 2017 International Joint Conference on Neural Networks (IJCNN 2017), Anchorage, AL, May 2017
-
BADGR:A Practical GHR Implementation for TAGE Branch Predictors [PDF]
David Schlais and Mikko H. Lipasti
In Proceedings of the 34th IEEE International Conference on Computer Design (ICCD 2016), Phoenix, AZ, Oct. 2016
-
Hash Map Inlining [PDF]
Dibakar Gope and Mikko H. Lipasti
In Proceedings of the 25th International Conference on Parallel Architectures and Compilation Techniques (PACT 2016), Haifa, Israel, September 2016
-
A Self-Learning Map-Seeking Circuit For Visual Object Recognition [PDF]
Rohit Shukla and Mikko H. Lipasti
In Proceedings of the 2015 International Joint Conference on Neural Networks (IJCNN 2015), Killarney, Ireland, July 2015
-
COP: To Compress and Protect Main Memory [PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of the 42nd International Symposium on Computer Architecture (ISCA-42), Portland, OR, June 2015
-
Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors [PDF]
Amir Yazdanbakhsh, David Palframan, Azadeh Davoodi, Nam Sung Kim and Mikko Lipasti
In Proceedings of the 2015 Great Lakes Symposium on VLSI (GLSVLSI-2015), Pittsburgh, PA, May 2015
- iPatch: Intelligent Fault Patching to Improve Energy Efficiency [PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture (HPCA 2015), San Francisco, CA, Feb. 2015.
- Tag Tables [PDF]
Sean Franey and Mikko H. Lipasti
In Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture (HPCA 2015), San Francisco, CA, Feb. 2015.
- Bias-Free Branch Prediction [PDF]
Dibakar Gope and Mikko Lipasti
In Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-47)), Cambridge, UK, Dec. 2014.
- Tag Check Elision [PDF]
Zhong Zheng, Zhiying Wang and Mikko Lipasti
In Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), La Jolla, CA, August 2014.
- Revolver: Processor Architecture for Power Efficient Loop Execution [PDF]
Mitchell Hayenga, Vignyan Reddy, and Mikko H. Lipasti
In Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture (HPCA 2014), Orlando, FL, Feb. 2014.
- Precision-Aware Soft Error Protection for GPUs [PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture (HPCA 2014), Orlando, FL, Feb. 2014.
- Atomic SC for Simple In-order Processors [PDF]
Nominated for best paper award!
Dibakar Gope and Mikko H. Lipasti
In Proceedings of the 20th IEEE International Symposium on High Performance Computer Architecture (HPCA 2014), Orlando, FL, Feb. 2014.
- Wavelength Stealing: An Opportunistic Approach to Channel Sharing in Multi-chip Photonic Interconnects [PDF]
Arslan Zulfiqar, Pranay Koka, Herb Schwetman, Mikko Lipasti, Xuezhe Zheng, and Ashok V. Krishnamoorthy
In Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-46)), Davis, CA, Dec. 2013.
- Data Compression for Thermal Mitigation in the Hybrid Memory Cube [PDF]
Mushfique Khurshid and Mikko Lipasti
In Proceedings of the 31st IEEE International Conference on Computer Design (ICCD 2013), Asheville, NC, Oct. 2013.
- REEL: Reducing Effective Execution Latency of Floating Point Operations [PDF]
Vignyan Kothinti Naresh, Syed Gilani, Michael Schulte, Nam Sung Kim, and Mikko Lipasti
In Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED), Beijing, China, Sep. 2013.
- Accelerating Atomic Operations on the GPU for Broader Applicability [PDF]
Sean Franey and Mikko H. Lipasti
In Proceedings of the 7th IEEE Network on Chip Symposium, Tempe, AZ, April 2013.
- Bridging the Semantic Gap: Emulating Biological Neuronal Behaviors with Simple Digital Neurons
[PDF]
Andrew Nere, Atif Hashmi, Mikko Lipasti, and Giulio Tononi
In Proceedings of the 19th IEEE International Symposium on High-Performance Computer Architecture (HPCA-19), Shenzhen, China, February 2013.
- BenchNN: On the Broad Potential Application Scope of Hardware Neural Network Accelerators
[PDF]
Nominated for best paper award!
Tianshi Chen, Yunji Chen, Marc Duranton, Qi Guo, Atif Hashmi, Mikko Lipasti, Andrew Nere, Shi Qiu, Michele Sebag, Olivier Temam
In Proceedings of the 2012 IEEE International Symposium on Workload Characterization (IISWC 2012), San Diego, CA, Nov 2012.
- Mitigating Random Variation with Spare RIBs: Redundant Intermediate Bitslices
[PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of the 42nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2012), Boston, MA, June 2012.
- CRAM: Coded Registers for Amplified Multiporting [PDF]
Vignyan Reddy Kothinti Naresh, David J. Palframan, and Mikko H. Lipasti
In Proceedings of the 44th International Symposium on Microarchitecture (MICRO-44), Porto Alegre, Brazil, December 2011.
- The NoX Router [PDF][Slides]
Nominated for best paper award!
Mitchell Hayenga and Mikko H. Lipasti
In Proceedings of the 44th International Symposium on Microarchitecture (MICRO-44), Porto Alegre, Brazil, December 2011.
- Automatic Abstraction and Fault Tolerance in Cortical Microarchitectures[PDF]
Atif Hashmi, Hugues Berry, Olivier Temam, and Mikko H. Lipasti
In Proceedings of the 38th International Symposium on Computer Architecture (ISCA-38), San Jose, CA, June 2011
- CRIB: Consolidated Rename, Issue, and Bypass[PDF]
Erika Gunadi and Mikko H. Lipasti
In Proceedings of the 38th International Symposium on Computer Architecture (ISCA-38), San Jose, CA, June 2011
- Profiling Heterogeneous Multi-GPU Systems to Accelerate Cortically Inspired Learning Algorithms[PDF]
Selected as best paper in track!
Andrew Nere, Atif Hashmi, and Mikko H. Lipasti
In Proceedings of the 25th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2011), Anchorage, Alaska, May 2011.
- Learning through Spatially Localized and Temporally Correlated Spontaneous Activations [PDF]
Atif Hashmi, Andrew Nere, and Mikko H. Lipasti
In Proceedings of the 15th International Conference on Cognitive and Neural Systems (ICCNS-15), Boston, MA, May 2011 (abstract and talk).
- Accelerating Search and Recognition Workloads with SSE 4.2 String and Text Processing Instructions[PDF]
Guangyu Shi, Min Li, and Mikko H. Lipasti
In Proceedings of the 2011 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2011), Austin, TX, April 2011.
- Time Redundant Parity for Low-Cost Transient Error Detection[PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of Design, Automation, and Test in Europe (DATE 2011), Grenoble, France, March 2011.
- A Case for Neuromorphic Instruction Set Architectures[PDF]
Atif Hashmi, Andrew Nere, James Thomas, and Mikko H. Lipasti
In Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2011), Newport Beach, CA, March 2011.
- Atomic Coherence: Leveraging Nanophotonics to Build Race-Free Cache Coherence Protocols[PDF]
Dana Vantrease, Nate Binkert, and Mikko H. Lipasti
In Proceedings of the 17th IEEE International Symposium on High-Performance Computer Architecture (HPCA-17), San Antonio, TX, February 2011.
- Combating Aging with the Colt Duty Cycle Equalizer [PDF]
Erika Gunadi, Abhisek Sinkar, Nam Sung Kim, and Mikko Lipasti
In Proceedings of the 43rd International Symposium on Microarchitecture (MICRO-43), Atlanta, GA, December 2010.
- Discovering Cortical Algorithms [PDF]
Atif Hashmi and Mikko Lipasti
In Proceedings of the International Conference on Neural Computation (ICNC), Valencia, Spain, October 2010.
- Discovering Cortical Algorithms [PDF]
Atif Hashmi and Mikko Lipasti
In Proceedings of the 14th International Conference on Cognitive and Neural Systems (ICCNS-14), Boston, MA, May 2010 (abstract and talk).
- Light Speed Arbitration and Flow Control for Nanophotonic Interconnects [PDF]
Dana Vantrease , Nathan Binkert, Robert Schreiber, and Mikko Lipasti
In Proceedings of the 42nd International Symposium on Microarchitecture (MICRO-42), New York, NY, December 2009.
- SCARAB: A Single Cycle Adaptive Routing and Bufferless Network [PDF](revised)
Mitchell Hayenga, Natalie Enright Jerger, Mikko Lipasti
In Proceedings of the 42nd International Symposium on Microarchitecture (MICRO-42), New York, NY, December 2009.
- Achieving Predictable Performance Through Better Memory Controller Placement in Many-Core CMPs [PDF]
Dennis Abts, Natalie Enright Jerger, John Kim, Dan Gibson, Mikko Lipasti
In Proceedings of the 36th Annual International Symposium on Computer Architecture, Austin, TX, June 2009.
- Cortical Columns: Building Blocks for Intelligent Systems [PDF]
Atif Hashmi and Mikko Lipasti
In Proceedings of IEEE Symposium on Computational Intelligence for Multimedia Signal and Vision Processing, Nashville, TN, March 2009.
- Virtual Tree Coherence: Leveraging Regions and In-Network Multicast Trees for Scalable Cache Coherence [PDF]
Natalie Enright Jerger, Li-Shiuan Peh, and Mikko H. Lipasti
In Proceedings of the International Symposium on Microarchitecture (MICRO-41), Lake Como, Italy, November 2008.
- Skewed Redundancy [PDF]
Gordon B. Bell and Mikko H. Lipasti
In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques (PACT-17), October, 2008.
- Accelerating Search and Recognition with a TCAM Functional Unit [PDF]
Atif Hashmi and Mikko H. Lipasti
In Proceedings of the International Conference on Computer Design (ICCD), October, 2008.
- An Accurate Flip-flop Selection Technique for Reducing Logic SER [PDF]
Eric L. Hill, Mikko H. Lipasti, and Kewal K. Saluja
In Proceedings of The 38th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN-2008), Anchorage, Alaska, June 2008.
- Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support [PDF]
Natalie Enright Jerger, Li-Shiuan Peh, and Mikko H. Lipasti
In Proceedings of the International Symposium on Computer Architecture (ISCA-35), Beijing, China, June 2008.
- Circuit-Switched Coherence [PDF]
Natalie Enright Jerger, Li-Shiuan Peh, and Mikko H. Lipasti
In Proceedings of the IEEE Network on Chip Symposium, Newcastle-Upon-Tyne, UK, April 2008.
- Power-Aware DRAM Speculation [PDF]
Nidhi Aggarwal, Jason Cantin, Mikko H. Lipasti, and James E. Smith
In Proceedings of 14th International Symposium on High-Performance Computer Architecture (HPCA-14), Salt Lake City, UT, February 2008.
- Transparent Mode Flip-Flops for Collapsible Pipelines [PDF]
Eric Hill and Mikko H. Lipasti
In Proceedings of the 25th IEEE International Conference on Computer Design (ICCD-25), Lake Tahoe, CA, October 2007
- A Position-Insensitive Finished Store Buffer [PDF]
Erika Gunadi and Mikko H. Lipasti
In Proceedings of the 25th International Symposium on Computer Design (ICCD-25), Lake Tahoe, CA, October 2007.
Slides available
- An Evaluation of Server Consolidation Workloads for Multi-core Designs [PDF]
Natalie Enright Jerger, Dana Vantrease, and Mikko H. Lipasti
In Proceedings of the IEEE International Symposium on Workload Characterization (IISWC), Boston, MA, September 2007.
- Power-Aware Operand Delivery [PDF]
Erika Gunadi and Mikko H. Lipasti
In Proceedings of International Symposium on Low Power Electronics and Design (ISLPED) , Portland, OR, August 2007.
Poster available
- Speculative Optimization Using Hardware-Monitored Guarded Regions
for Java Virtual Machines [PDF]
Lixin Su and Mikko H. Lipasti
In Proceedings of of the 3rd International ACM SIGPLAN/SIGOPS
Conference on Virtual Execution Environments (VEE-3), San Diego, CA, June 2007.
- Stall Cycle Redistribution in a Transparent Fetch Pipeline [PDF]
Eric Hill and Mikko H. Lipasti
In Proceedings of Intl. Symposium on Low Power Electronics and Design, October 2006.
- Stealth Prefetching [PDF]
Jason F. Cantin, Mikko H. Lipasti, and James E. Smith
In Proceedings of: 12th Intl. Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-XII), October 2006.
- Dynamic Class Hierarchy Mutation [PDF]
Lixin Su and Mikko H. Lipasti
In Proceedings of of the 4th International Symposium on Code Generation and Optimization (CGO-4), New York, NY, March 2006.
- Friendly Fire: Understanding the Effects of Multiprocessor Prefetching [PDF]
Natalie Enright Jerger, Eric L Hill, and Mikko H. Lipasti
In Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2006), Austin, TX, March 2006.
- An Approach for Implementing Efficient Superscalar CISC Processors [PDF]
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, and James E. Smith
In Proceedings of of the 12th International Symposium on High-Performance Computer Architecture (HPCA-12), Austin, TX, February 2006.
- Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking [PDF]
Jason F. Cantin, Mikko H. Lipasti, and James E. Smith
In Proceedings of the 32nd International Symposium on Computer
Architecture (ISCA-32), Madison, WI, June 2005.
- Reaping the Benefit of Temporal Silence to Improve Communication Performance [PDF]
Kevin M. Lepak and Mikko H. Lipasti
In Proceedings of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS-2005), Austin, TX, March 2005.
- Memory Ordering: A Value-based Approach [PDF][PS][.bib]
Harold W. Cain and Mikko H. Lipasti
In Proceedings of the 31st International Symposium on Computer Architecture (ISCA-31), Munich, Germany, June 2004.
Slides available
- Physical Register Inlining [PDF][PS]
Mikko H. Lipasti, Brian R. Mestan, and Erika Gunadi
In Proceedings of the 31st International Symposium on Computer Architecture (ISCA-31), Munich, Germany, June 2004.
Slides available
- Deconstructing Commit [PDF][PS][.bib]
Gordon B. Bell and Mikko H. Lipasti
In Proceedings of the 4th International Symposium on Performance Analysis of Systems and Software (ISPASS-4), Austin, TX, March 2004. [Slides to be available]
- Understanding Scheduling Replay Schemes [PDF][PS][.bib]
Ilhyun Kim and Mikko H. Lipasti
In Proceedings of the 10th International Symposium on High-performance Computer Architecture (HPCA-10), Madrid, Spain, February 2004. [Slides to be available]
- Macro-op Scheduling: Relaxing Scheduling Loop Constraints [PDF][PS][.bib]
Ilhyun Kim and Mikko H. Lipasti
In Proceedings of the 36th International Symposium on Microarchitecture (MICRO-36), San Diego, CA, December 2003. Slides available
- Redeeming IPC as a Performance Metric for Multithreaded Programs [pdf, ps]
Kevin M. Lepak, Harold W. Cain, and Mikko H. Lipasti
In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, September, 2003.
- Constraint Graph Analysis of Multithreaded Programs [pdf, ps]
Harold W. Cain, Mikko H. Lipasti, and Ravi Nair
In Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, September, 2003.
- Exploiting Partial Operand Knowledge [pdf, ps]
Brian Mestan and Mikko H. Lipasti
In Proceedings of the International Conference on Parallel Processing (ICPP-03), October, 2003.
- Half-Price Architecture [PDF][PS][.bib]
Ilhyun Kim and Mikko H. Lipasti
In Proceedings of the 30th International Symposium on Computer Architecture (ISCA-30), San Diego, CA, June 2003. Slides available
pp
- A Case for Vector Network Processors [PDF]
Madhusudanan Seshadri and Mikko H. Lipasti
In Proceedings of Network Processor Conference West, San Jose, CA, October 2002.
- Temporally Silent Stores [PDF][PS][.bib]
Kevin M. Lepak and Mikko H. Lipasti
In Proceedings of 10th Intl. Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), October 2002.
Slides available
- Verifying Sequential Consistency Using Vector Clocks [PDF][PS][.bib]
Harold W. Cain and Mikko H. Lipasti
In Proceedings of the 14th Symposium on Parallel Algorithms and Architectures Revue , August 2002. Slides to be available
- Avoiding Initialization Misses to the Heap [PDF][PS][.bib]
Jarrod A. Lewis, Bryan Black, and Mikko H. Lipasti
In Proceedings of 29th International Symposium on Computer Architecture (ISCA-29), May 2002. Slides available
- Implementing Optimizations at Decode Time [PDF][PS][.bib]
Ilhyun Kim and Mikko H. Lipasti
In Proceedings of the 29th International Symposium on Computer Architecture (ISCA-29), May 2002. Slides available
- Correctly Implementing Value Prediction in Microprocessors that Support Multithreading or Multiprocessing [PDF][PS][.bib]
Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, and Mikko H. Lipasti
In Proceedings of the 34th International Symposium on Microarchitecture, December 2001. Slides available
- An Architectural Evaluation of Java TPC-W [PDF][PS][.bib]
Harold W. Cain, Ravi Rajwar, Morris Marden and Mikko H. Lipasti
In Proceedings of The Seventh International Symposium on High-Performance Computer Architecture, January 2001. Slides available
- Silent Stores for Free [PDF][PS][.bib]
Kevin M. Lepak and Mikko H. Lipasti
In Proceedings of The 33rd Annual ACM/IEEE International Symposium on Microarchitecture (MICRO-33), December, 2000. Slides available
- Characterization of Silent Stores[PDF][PS][.bib]
Gordon B. Bell, Kevin M. Lepak, and Mikko H. Lipasti
International Conference on Parallel Architectures and Compilation Techniques, October, 2000. Slides available
- On the Value Locality of Store Instructions[PDF][PS][.bib]
Kevin M. Lepak and Mikko H. Lipasti
In Proceedings of the 27th International Symposium on Computer Architecture, June, 2000.
Slides available Trip pictures
- Coordinated Design of Workloads and Systems via Machine Learning
Gokul Ravi, Ramon Bertran, Pradip Bose, and Mikko H. Lipasti
Workshop on Modeling and Simulation of Systems and Applications (ModSim 2020), August 2020.
- BlurNet: Defense by Filtering the Feature Maps [IEEE Explorer]
Ravi Raju and Mikko H. Lipasti
In Proceedings of the workshop on Dependable and Secure Machine Learning (DSML 2020), June 2020.
- BitSAD: A Domain-Specific Language for Bitstream Computing
[PDF]
Kyle Daruwalla, Heng Zhuo and Mikko Lipasti
In Proceedings of the First ISCA Workshop on Unary Computing (WUC'19), Phoenix, AZ, June 2019.
- Resource Efficient Navigation Using Bitstream Computing
[PDF]
Kyle Daruwalla and Mikko Lipasti
In Proceedings of the First ISCA Workshop on Unary Computing (WUC'19), Phoenix, AZ, June 2019.
- McMahon: Minimum-cycle Maximum-hop network
[PDF]
Gokul Subramanian Ravi, Tushar Krishna and Mikko Lipasti
In Proceedings of The 2019 Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS-2019), Valencia, Spain, January 2019.
- Axl: Accelerating Approximations via Slack Recycling
[PDF]
Gokul Subramanian Ravi and Mikko Lipasti
In Proceedings of The 2018 Workshop on Approximate Computing Across the Stack (WAX-2018), Williamsburg, VA, March 2018.
- End-to-end Stochastic Computing
[PDF]
Carly Schulz and Mikko Lipasti
In Proceedings of the First Workshop on Pioneering Processor Paradigms, Austin, TX, February 2017.
- Implementing Stochastic Hopfield-Network-based Linear Solvers on a Hardware-Constrained Neural Substrate
[PDF]
Erik Jorgensen, Rohit Shukla, and Mikko Lipasti
In Proceedings of the Sensors to Cloud Architectures Workshop (SCAW-2017), Austin, TX, February 2017.
-
Hazard Prevention Models in GPGPUsim [PDF]
Michael Mishkin, Nam Sung Kim, and Mikko Lipasti
In 14th annual Workshop on Duplicating, Deconstructing and Debunking held in conjunction with the 43rd IEEE International Symposium on Computer Architecture (ISCAWDDD), Seoul, South Korea, June 2016
- Statement-Level Parallelism
[PDF]
Dibakar Gope and Mikko Lipasti
In Proceedings of the First Workshop on High Performance Scripting Languages, San Francisco, CA, February 2015.
- Bias-Free Neural Predictor
[PDF]
Dibakar Gope and Mikko Lipasti
In Proceedings of 4th JILP Workshop on Computer Architecture Competitions (JWAC-4):Championship Branch Prediction (CBP-4), Minneapolis, MN, June 2014.
- Online and Operand-Aware Detection of Failures by Utilizing False Alarm Vectors
[PDF]
Amir Yazdanbakhsh, David Palframan, Azadeh Davoodi, Nam Sung Kim, and Mikko Lipasti
In Proceedings of 22nd International Workshop on Logic & Synthesis (IWLS), Austin, TX, June 2013.
- Analyzing the Soft Error Resilience of the CRIB Microarchitecture
[PDF]
Vignyan Reddy Kothinti Naresh, David J. Palframan and Mikko H. Lipasti
In Proceedings of the 3rd Workshop on Resilient Architectures (WRA-3), Vancouver, BC, December 2012.
- Edge Chasing Delayed Consistency: Pushing the Limits of Weak Memory Models
[PDF]
Harold W. Cain and Mikko H. Lipasti
In Proceedings of the Workshop on Relaxing Synchronization for Multicore and Manycore Scalability (RACES'12), Tucson, AZ, October 2012 (archival publication via ACM Digital Library).
- Pitfalls of Orion-based Simulation
[PDF]
Mitchell Hayenga, Daniel Johnson, Mikko Lipasti
In Proceedings of the Workshop on Duplicating, Deconstructing, and Debunking (WDDD-12), Portland, OR, June 2012.
- Spare RIBs: Redundant Intermediate Bitslices
[PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
In Proceedings of the 2nd Workshop on Resilient Architectures (WRA-2), Porto Alegre, Brazil, December 2011.
- Perceptron Branch Prediction with Separated Taken/Not-Taken Weight Tables
[PDF]
Guangyu Shi and Mikko H. Lipasti
In Proceedings of the 2nd JILP Workshop on Computer Architecture Competitions: Championship Branch Prediction (JWAC-2), San Jose, CA, June 2011.
- MadCache: A PC-aware Cache Insertion Policy
[PDF]
Mitchell Hayenga, Andrew T. Nere and Mikko H. Lipasti
In Proceedings of the 1st JILP Workshop on Computer Architecture Competitons(JWAC-1),Saint-Malo, France June 2010.
- Logic Soft Errors in a Parallel CISC Decoder
[PDF]
Eric L. Hill and Mikko H. Lipasti
In Proceedings of the 2010 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 2010), Stanford University, CA, March, 2010.
- The Effect of Pipeline Depth on Logic Soft Errors
[PDF]
Eric L. Hill and Mikko H. Lipasti
In Proceedings of the 2010 IEEE Workshop on Silicon Errors in Logic - System Effects (SELSE 2010), Stanford University, CA, March, 2010.
- Cortical Architectures on a GPGPU
[PDF]
Andrew T. Nere and Mikko H. Lipasti
In Proceedings of the Workshop on General-Purpose Computation on Graphics Processing Units, Pittsburgh, PA, March, 2010.
- Leveraging Progress in Neurobiology for Computing Systems
[PDF]
Atif Hashmi, Hugues Berry, Olivier Temam and Mikko H. Lipasti
Workshop on New Directions in Computer Architecturem held in Conjunction with 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42), New York, NY, December, 2009.
- Nanophotonic Barriers
[PDF]
Nathan Binkert, Al Davis, Mikko H. Lipasti, Robert Schreiber, and Dana Vantrease
Workshop on Photonic Interconnects And Computer Architecture. Held in Conjunction with 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42), New York, NY, December, 2009.
- Achieving Fault Detection & Performance on CMPs
[PDF]
Gordon B. Bell and Mikko H. Lipasti
In Proceedings of the SELSE 3 Workshop - Silicon Errors in Logic - System Effects, Austin, TX, March, 2007.
- Phase-based Adaptive Branch Predictor: Seeing the Forest for the Trees
[PDF]
Karthik Jayaraman, Vivek Shrivastava, Brian Pellin, Martin Hock, and Mikko H. Lipasti
Workshop on Introspective Architecture, Austin, TX, February, 2006.
- Opportunities for Cache Friendly Process Scheduling
[PDF]
Pranay Koka and Mikko H. Lipasti
Workshop on Interaction between Operating System and Computer Architecture, October, 2005. Slides available
- A Comparison of SPECjAppServer2002 and SPECjAppServer2004
[PDF]
Lixin Su, Kingsum Chow, Kumar Shiv, and Ashish Jha
Workshop on Computer Architecture Evaluation using Commercial Workloads, in conjunction with HPCA, February, 2005.
- Cache Pipelining with Partial Operand Knowledge
[PDF]
Erika Gunadi and Mikko H. Lipasti
Workshop on Complexity-Effective Design, in conjunction with ISCA, June, 2004. Slides available
- Characterization of an IMAP Server on a Shared-Memory Multiprocessor
[PDF]
[PS]
Pranay Koka and Mikko H. Lipasti
Seventh Workshop on Computer Architecture Evaluation using Commercial Workloads , in conjunction with HPCA, February, 2004.
- Exploring Efficient SMT Branch Predictor Design
[PDF]
[PS]
Matt Ramsay, Chris Feucht, and Mikko H. Lipasti
Workshop on Complexity-Effective Design, in conjunction with ISCA, June, 2003.
- Precise and Accurate Processor Simulation
[PDF]
[PS]
Harold W. Cain, Kevin M. Lepak, Brandon A. Schwartz, and Mikko H. Lipasti
Workshop on Computer Architecture Evaluation using Commercial Workloads, in conjunction with HPCA, February, 2002.
- Comparison of Memory System Behavior in Java and Non-Java Commercial Workloads
[PDF]
[PS]
Morris Marden, Shih-Lien Lu, Konrad Lai, and Mikko Lipasti
Workshop on Computer Architecture Evaluation using Commercial Workloads, in conjunction with HPCA, February, 2002.
- Dynamic Verification of Cache Coherence Protocols
[PDF]
[PS]
Jason F. Cantin, Mikko H. Lipasti, and James E. Smith
Workshop on Memory Performance Issues, in conjunction with ISCA, June, 2001. Slides available
- Power Efficient Cache Coherence
[PDF]
[PS]
Craig Saldanha and Mikko H. Lipasti
Workshop on Memory Performance Issues, in conjunction with ISCA, June, 2001. Slides available
- A Dynamic Binary Translation Approach to Architectural Simulation
[PDF]
[PS]
Harold W. Cain, Kevin M. Lepak and Mikko H. Lipasti
Workshop on Binary Translation(WBT-2000), in conjunction with PACT, October, 2000. Slides available
Also appearing in Computer Architecture News, Vol. 29, No. 1, March 2001.
- Systems-on-Chip with Strong Ordering [PDF]
Sooraj Puthoor and Mikko H. Lipasti
ACM Transactions on Architecture and Code Optimization (TACO), vol. 18 no. 1, pp. 1-27, 2020. DOI.
- Value Locality based Approximation with ODIN [ACM DL]
Rahul Singh, Gokul Subramanian Ravi, Mikko H. Lipasti, and Joshua San Miguel
IEEE Computer Architecture Letters (CAL), 2020.
- SHASTA: Synergic HW-SW Architecture for Spatio-Temporal Approximation [ACM DL]
Gokul Ravi, Joshua San Miguel, and Mikko H. Lipasti
ACM Transactions on Architecture and Code Optimization (TACO), 2020.
- BitSADv2: Compiler Optimization and Analysis for Bitstream Computing [ACM DL]
Kyle Daruwalla, Heng Zhuo, Rohit Shukla, and Mikko Lipasti
ACM Transactions on Architecture and Code Optimization (TACO), 2019.
- REMODEL: Rethinking Deep Cnn Models to Detect and Count on a NeuroSynaptic System [Online/full]
Rohit Shukla, Mikko Lipasti, Brian Van Essen, Adam Moody, and Naoya Maruyama
Frontiers in Neuroscience, 2019
https://doi.org/10.3389/fnins.2019.00004
- Computing Generalized Matrix Inverse on Spiking Neural Substrate [Online]
Rohit Shukla, Soroosh Khoram, Erik Jorgensen, Jing Li, Mikko Lipasti, and Stephen Wright
Frontiers in Neuroscience-Neuromorphic Engineering, 2018
https://doi.org/10.3389/fnins.2018.00115
- The CURE: Cluster Communication Using Registers [PDF]
Vignyan Reddy Kothinti Naresh, Dibakar Gope, and Mikko Lipasti
ACM Trans. Embed. Comput. Syst. 16, 5s, Article 124 (August 2017).
- Timing Speculation in Multi-Cycle Data Paths
[IEEE Xplorer]
Gokul Ravi and Mikko Lipasti
IEEE Computer Architecture Letters, vol. PP, issue 99, 2016.
- Adaptive Cache and Concurrency Allocation on GPGPUs
[IEEE Xplorer][PDF]
Zhong Zheng, Z Wang, and Mikko Lipasti
IEEE Computer Architecture Letters, vol. PP, issue 99, 2014.
- Resilient High-Performance Processors with Spare RIBs
[PDF]
David J. Palframan, Nam Sung Kim, and Mikko H. Lipasti
IEEE MICRO, vol. 33, no. 4, July-Aug 2013 (special issue on reliability).
- Simulating Cortical Networks on Heterogeneous Multi-GPU Systems
[PDF]
Andrew Nere, Sean Franey, Atif Hashmi, and Mikko Lipasti
Journal of Parallel and Distributed Computing, 73(7), pp. 953--971, 2012.
- A Cortically-Inspired Learning Model
[PDF]
Atif Hashmi and Mikko Lipasti
Studies in Computational Intelligence, Vol. 399, 2012 (Special Issue).
- Narrow Width Dynamic Scheduling
[PDF]
Erika Gunadi and Mikko H. Lipasti
Journal of Instruction-Level Parallelism, Vol. 9, April 2007 (http://www.jilp.org/vol9).
- Circuit-Switched Coherence
[IEEE Xplorer][PDF]
Natalie Enright Jerger, Mikko Lipasti, and Li-Shiuan Peh
IEEE Computer Architecture Letters, vol. 6, no. 1, Jan-Jun, 2007.
- Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays
[IEEE Xplorer][PDF]
Jason Cantin, Mikko H. Lipasti, James E. Smith, Andreas Moshovos, and Babak Falsafi
IEEE Micro, Vol. 26, no. 1 (Special Issue on Top Picks in Computer Architecture), pp. 70-79.
- The Complexity of Verifying Memory Coherence and Consistency
[IEEE Xplore][PDF]
J. F. Cantin, M. H. Lipasti, and J. E. Smith
IEEE Transactions on Parallel and Distributed Systems, Vol. 16, No. 7, July 2005.
- Memory ordering: a value-based Approach
[IEEE Xplore]
[PDF]
Harold W. Cain and Mikko H. Lipasti
IEEE Micro, vol.24, no.6, pp. 110- 117, Nov.-Dec. 2004 (Special Issue on Top Picks in Computer Architecture).
- Power Efficient Cache Coherence [PDF as published][PS as published]
Full-length technical report version [PDF full-length][PS full-length]
Craig Saldanha and Mikko H. Lipasti
High Performance Memory Systems, edited by H. Hadimiouglu, D. Kaeli, J. Kuskin, A. Nanda, and J. Torrellas, Springer-Verlag, 2003.
- Dynamic Verification of Cache Coherence Protocols
Jason F. Cantin, Mikko H. Lipasti, and James E. Smith
High Performance Memory Systems, edited by H. Hadimiouglu, D. Kaeli, J. Kuskin, A. Nanda, and J. Torrellas, Springer-Verlag, 2003.
- Silent Stores and Store Value Locality[PDF][PS][.bib]
Kevin M. Lepak, Gordon B. Bell, and Mikko H. Lipasti
IEEE Transactions on Computers, Vol. 50, No. 11, November 2001
- Spatiotemporal Coherence and Consistency
[PDF]
Sooraj Puthoor, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, December 2022
- Towards Efficient Inference and Improved Training Efficiency of Deep Neural Networks
[PDF]
Ravi Raju, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, August 2022
- Building Energy Efficient Computers with Brain-Inspired Computing Models
[PDF]
Kyle Daruwalla, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, June 2022
- Modeling and Designing Secure Tightly-Coupled Accelerators in CPUs
[PDF]
David Schlais, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, December 2020
- Integrating Computing Systems from the Gates up: Breaking the Clock Abstraction
[PDF]
Gokul Ravi, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, August 2020
- MicroGrad: A Centralized Framework for Workload Cloning and Stress Testing
[Arxiv]
Gokul Ravi, Ramon Bertran, Pradip Bose, and Mikko Lipasti
Submitted 9/10/2020
- Efficient Inference Acceleration
[PDF]
Michael Mishkin, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, June 2019
- Addressing the Algorithmic Gap in Low-Precision Neural Network Substrates
[PDF]
Rohit Shukla, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, August 2018
- Architectural Support for Scripting Languages
[PDF]
Dibakar Gope, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, May 2017
- Cost-Effective Techniques for Processor Reliability
[PDF]
David Palframan, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, May 2015
- Tag Tables
[PDF]
Sean Franey, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, Aug 2014
- Express Misprediction Recovery
[PDF]
Vignyan Kothinti Naresh, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, Aug 2014
- Efficient Architectures for Multichip Communication
[PDF]
Mohammad Arslan Zulfiqar, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, Aug 2014
- Power-Efficient Loop Execution Techniques
[PDF]
Mitchell Hayenga, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, Aug 2013
- Computing with Hierarchical Attractors of Spiking Neurons
[PDF]
Andrew Nere, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, May 2013
- Cortical Columns: A Non Von Neumann Computational Abstraction
[PDF]
Atif Gul Hashmi, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, Dec 2011
- Optical Tokens in Many-core Processors
[PDF]
Dana Vantrease, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in CS, May 2010
- CRIB: Consolidated Rename, Issue, and Bypass
[PDF]
Erika Gunadi, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, May 2010
- Understanding and Mitigating the Effects of Soft Errors in Logic
[PDF]
Eric Hill, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, May 2009
- Chip Multiprocessor Coherence and Interconnect System Design [PDF]
Natalie Enright Jerger, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.d. degree in ECE, December 2008
- Streamlined Atomic Execution for Java [PDF]
Lixin Su, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, August 2008
- Latency- and Error-Tolerant Redundant Execution [PDF]
Gordon B Bell, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, December 2007
- Coarse-grain coherence tracking[PDF]
Jason cantin, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, May 2006
- Profligate Execution[PDF]
Gordon B. Bell and Mikko H. Lipasti
Technical Report, September 2006
- Dynamic Scheduling with Narrow Operand Values[PDF][PS]
Erika Gunadi
Submitted in partial fulfillment of the M.S. degree in ECE, June 2005
- Detecting and Exploiting Causal Relationships in Hardware
Shared-Memory Multiprocessors [PDF]
Harold W Cain
Submitted in partial fulfillment of the Ph.D. degree in CS, Dec 2004
- Benefits of Value-Range Cache: A Limit Study [PDF][PS]
Ramya K Narayana
Submitted in partial fulfillment of the M.S. degree in ECE, May 2004
- Macro-op Scheduling and Execution [PDF]
Ilhyun Kim, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, May 2004
- Exploring, Defining, and Exploiting Recent Store Value Locality [PDF]
Kevin M Lepak, Ph.D. Thesis
Submitted in partial fulfillment of the Ph.D. degree in ECE, December 2003
- Dataflow Dominance: A Definition and Characterization [PDF][PS]
Matt Ramsay
Submitted in partial fulfillment of the M.S. degree in ECE, December 2003
- Exploiting Partial Operand Knowledge [PDF][PS]
Brian Mestan
Submitted in partial fulfillment of the M.S. degree in ECE, May, 2002
- Vector Network Processors [PDF][PS]
Madhusudanan Seshadri
Submitted in partial fulfillment of the M.S. degree in ECE, May, 2002
- Characterization of Silent Stores [PDF][PS]
Gordon Bell
Submitted in partial fulfillment of the M.S. degree in ECE, May 18, 2001
- A Genetic Algorithm for Designing Parallel Processor Interconnection Networks [PDF][PS]
Morris Marden
Submitted in partial fulfillment of the M.S. degree in ECE, May 18, 2001
- Performance and Power via Speculative Decode [PDF][PS]
Ilhyun Kim
Submitted in partial fulfillment of the M.S. degree in ECE, May 18, 2001
- Power Efficient Cache Coherence
Craig Saldanha
Submitted in partial fulfillment of the M.S. degree in ECE, May 18, 2001
- Silent Stores for Free: Reducing the Cost of Store Verification [PDF][PS]
Kevin M. Lepak
Submitted in partial fulfillment of the M.S. degree in ECE, December 15, 2000
Last Updated: Apr-12-2024 10:59:11 CDT